Nanoscale Memristor Device and Circuits Design.
Nanoscale Memristor Device and Circuits Design provides theoretical frameworks, including (i) the background of memristors, (ii) physics of memristor and their modeling, (iii) menristive device applications, and (iv) circuit design for security and authentication.
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| Päätekijä: | |
|---|---|
| Muut tekijät: | , , |
| Aineistotyyppi: | Elektroninen E-kirja |
| Kieli: | englanti |
| Julkaistu: |
San Diego :
Elsevier,
2023.
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| Sarja: | Micro & nano technologies.
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| Aiheet: | |
| Linkit: | ScienceDirect |
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| 100 | 1 | |a Raj, Balwinder. | |
| 245 | 1 | 0 | |a Nanoscale Memristor Device and Circuits Design. |
| 264 | 1 | |a San Diego : |b Elsevier, |c 2023. | |
| 300 | |a 1 online resource (254 p.). | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Micro and Nano Technologies. | |
| 505 | 0 | |a Intro -- Nanoscale Memristor Device and Circuits Design -- Copyright -- Contents -- Contributors -- Preface -- Acknowledgments -- Chapter 1: Memristor and spintronics as key technologies for upcoming computing resources -- 1.1. End of Moores law -- 1.2. Life beyond Moores law: Multifunctional devices -- 1.2.1. Features, strengths, and properties of multifunctional devices -- 1.2.2. Components and devices -- 1.2.2.1. Memristors -- 1.2.2.2. Memristor-based neuromorphic computing -- 1.2.2.3. Spintronics -- 1.2.2.4. Spintronics-based neuromorphic computing | |
| 505 | 8 | |a 1.3. Materials for memristors and spintronics -- 1.3.1. Materials for memristors -- 1.3.2. Materials for spintronics -- 1.4. Future prospects based on memristors and spintronics -- 1.5. Challenges -- 1.6. Summary -- References -- Chapter 2: Design and investigation of various memristor models for neuromorphic applications -- 2.1. Introduction -- 2.2. Literature review -- 2.2.1. Nonlinear ionic drift model (Biolek model) -- 2.2.2. Simmons TB (tunnel barrier) model -- 2.2.3. Neuron biological model -- 2.2.4. Neuron classical model -- 2.2.5. Training algorithm flow diagram of Memristive perceptron | |
| 505 | 8 | |a 2.2.5.1. The algorithm of the training can be shown as steps, as follows: -- 2.2.5.2. Training procedure algorithm -- 2.2.5.3. Finalize values -- 2.2.6. Wide range of possible future memristor applications -- 2.2.7. Neuromorphic applications of memristors -- 2.2.7.1. Mathematics and physics-inspired circuits -- 2.2.7.2. Biological neuromorphic inspired course -- 2.3. Future work -- 2.4. Conclusion -- References -- Chapter 3: Memristor-based devices for hardware security applications -- Summary -- 3.1. Introduction -- 3.2. An overview of hardware security -- 3.3. Issues with counterfeited ICs | |
| 505 | 8 | |a 3.3.1. Physical unclonable functions (PUFs): A solution for counterfeited ICs -- 3.4. Nanoelectronic devices and their characteristics -- 3.5. Memristors -- 3.5.1. Theory -- 3.5.2. Device structure -- 3.5.3. Operation -- 3.5.4. Derivation of memristance -- 3.5.5. Write time -- 3.5.6. Basic characteristics of memristors -- 3.6. Prevention of side-channel attacks using memristors -- 3.7. Memristor-based physical unclonable functions (MemPUFs) -- 3.7.1. Architecture of MemPUFs -- 3.7.2. Operation -- 3.7.3. Security analysis -- 3.7.4. CMOS-based PUFs | |
| 505 | 8 | |a 3.7.5. Advantages over CMOS/CMOS equivalent PUFs -- 3.8. Memristor-based public physical unclonable functions (MemPPUFs) -- 3.9. Architecture of MemPPUFs -- 3.9.1. Operation -- 3.9.2. Security analysis -- 3.9.3. CMOS-based PPUFs -- 3.9.4. Advantages over CMOS-based PPUFs -- 3.10. Memristor-based tamper detection circuits (MemTDCs) -- 3.11. Architecture -- 3.11.1. Operation -- 3.11.2. Security analysis -- 3.11.3. CMOS-based tamper detection circuits -- 3.11.4. Advantages over CMOS-based tamper detection circuits -- 3.12. Memristor-based random bit generators (MemRBGs) -- 3.12.1. Architecture | |
| 500 | |a 3.12.2. Operation | ||
| 520 | |a Nanoscale Memristor Device and Circuits Design provides theoretical frameworks, including (i) the background of memristors, (ii) physics of memristor and their modeling, (iii) menristive device applications, and (iv) circuit design for security and authentication. | ||
| 650 | 0 | |a Memristors. | |
| 650 | 0 | |a Nanoelectromechanical systems. | |
| 650 | 6 | |a Memristances. |0 (CaQQLa)000281637 | |
| 650 | 6 | |a Nanosystèmes électromécaniques. |0 (CaQQLa)000262359 | |
| 650 | 7 | |a Memristors |2 fast |0 (OCoLC)fst01894553 | |
| 650 | 7 | |a Nanoelectromechanical systems |2 fast |0 (OCoLC)fst01741807 | |
| 700 | 1 | |a Hemani, Ahmed. | |
| 700 | 1 | |a Jabir, Abusaleh M. | |
| 700 | 1 | |a Khandelwal, Saurabh. | |
| 776 | 0 | 8 | |i Print version: |a Raj, Balwinder |t Nanoscale Memristor Device and Circuits Design |d San Diego : Elsevier,c2023 |z 9780323907934 |
| 830 | 0 | |a Micro & nano technologies. | |
| 856 | 4 | 0 | |3 ScienceDirect |u https://www.sciencedirect.com/science/book/9780323907934 |