Accelerating Network Functions Using Reconfigurable Hardware Design and Validation of High Throughput and Low Latency Network Functions at the Access Edge /

This book reports on new concepts and methods to design network functions on programmable hardware to accelerate connectivity. First, it introduces the host bypassing concept for improved integration of hardware accelerators in computer systems operating 5G radio access networks. This novel concept...

Disgrifiad llawn

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Prif Awdur: Kundel, Ralf (Awdur)
Awdur Corfforaethol: SpringerLink (Online service)
Fformat: Electronig eLyfr
Iaith:Saesneg
Cyhoeddwyd: Cham : Springer Nature Switzerland : Imprint: Springer, 2024.
Rhifyn:1st ed. 2024.
Cyfres:Springer Theses, Recognizing Outstanding Ph.D. Research,
Pynciau:
Mynediad Ar-lein:https://doi.org/10.1007/978-3-031-52872-9
Tagiau: Ychwanegu Tag
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!

MARC

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505 0 |a Introduction -- Background and State-of-the Art -- Design of QOS-Aware Network Functions -- P4sta: High precision network Function Benchmarking -- Evaluation. 
520 |a This book reports on new concepts and methods to design network functions on programmable hardware to accelerate connectivity. First, it introduces the host bypassing concept for improved integration of hardware accelerators in computer systems operating 5G radio access networks. This novel concept bypassed the system’s main memory and established direct connectivity between the accelerator and network interface card. This concept leads to improved throughput and significantly lowered latency jitter compared to existing methods. Second, the book analyzes different programmable hardware technologies for hardware-accelerated Internet subscriber handling, including three P4-programmable platforms and FPGAs. It shows that all the approaches have excellent performance and are suitable for Internet access creation. In turn, it presents a fully-fledged accelerated User Plane Function (UPF) designed upon these concepts and its testing in an end-to-end 5G standalone network. Third, it analyses and demonstrates the usability of Active Queue Management (AQM) algorithms on programmable hardware as an expansion to the access edge. It shows the feasibility of the CoDel AQM algorithm and discusses the challenges and constraints to be considered when limited hardware is used, resulting in significant improvements in the Quality of Service. Furthermore, the P4STA measurement framework is introduced, a network function benchmarking concept combing precise hardware-based time measurement methods with software-based load generation to simultaneously ensure high measurement accuracy and flexibility. Researchers and professionals will find in this book new solutions to improve both fixed and mobile internet access networks, offering an informative and inspiring reading for researchers and professionals involved in building the next generation of access edge networks and underlying technology. 
532 8 |a Accessibility summary: This PDF does not fully comply with PDF/UA standards, but does feature limited screen reader support, described non-text content (images, graphs), bookmarks for easy navigation and searchable, selectable text. Users of assistive technologies may experience difficulty navigating or interpreting content in this document. We recognize the importance of accessibility, and we welcome queries about accessibility for any of our products. If you have a question or an access need, please get in touch with us at accessibilitysupport@springernature.com. 
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532 8 |a Publisher contact for further accessibility information: accessibilitysupport@springernature.com 
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