Circuit-Technology Co-Optimization of SRAM Design in Advanced CMOS Nodes

Modern computing engines—CPUs, GPUs, and NPUs—require extensive SRAM for cache designs, driven by the increasing demand for higher density, performance, and energy efficiency. This book delves into two primary areas within ultra-scaled technology nodes: (1) advancing SRAM bitcell scaling and (2) exp...

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Bibliografiske detaljer
Main Authors: Liu, Hsiao-Hsuan (Author), Catthoor, Francky (Author)
Institution som forfatter: SpringerLink (Online service)
Format: Electronisk eBog
Sprog:engelsk
Udgivet: Cham : Springer Nature Switzerland : Imprint: Springer, 2025.
Udgivelse:1st ed. 2025.
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Online adgang:https://doi.org/10.1007/978-3-031-76109-6
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https://doi.org/10.1007/978-3-031-76109-6