Circuit-Technology Co-Optimization of SRAM Design in Advanced CMOS Nodes
Modern computing engines—CPUs, GPUs, and NPUs—require extensive SRAM for cache designs, driven by the increasing demand for higher density, performance, and energy efficiency. This book delves into two primary areas within ultra-scaled technology nodes: (1) advancing SRAM bitcell scaling and (2) exp...
-д хадгалсан:
| Үндсэн зохиолчид: | , |
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| Байгууллагын зохиогч: | |
| Формат: | Цахим Цахим ном |
| Хэл сонгох: | англи |
| Хэвлэсэн: |
Cham :
Springer Nature Switzerland : Imprint: Springer,
2025.
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| Хэвлэл: | 1st ed. 2025. |
| Нөхцлүүд: | |
| Онлайн хандалт: | https://doi.org/10.1007/978-3-031-76109-6 |
| Шошгууд: |
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Агуулга:
- Introduction
- SRAM Basic Principles and Simulation Methodologies
- SRAM Bitcell Scaling Roadmap Towards CFETs
- SRAM Subarray- and Macro-level DTCO PPA Analysis
- Beyond Traditional SRAM Bitcell-Level Scaling
- Future Design Direction for SRAM Data Array Towards A14
- Summaries.